Multilevel converters are considered to be a good choice for medium- and high-voltage applications. Prior to the use of multilevel converters, semiconductors needed to be connected in series in order to withstand the high voltages experienced during operation. This series configuration, however, required fast switching to avoid unequal voltage sharing among the devices, which could lead to a breakdown. Multilevel converters, however, have the advantage of clamping the voltages, which prevents the need for fast switching while also providing a smoother output voltage.
A neutral point clamped (NPC) multilevel converter, typically with three (3) levels, can be used to convert a DC signal to an AC signal or to convert an AC signal to a DC signal. One of the challenges with the NPC three-level converter is that of neutral point (NP) voltage balancing. As is known, the correct operation of an NPC converter requires that the voltages across the respective DC capacitors be the same in order to equally distribute the voltage stress, uniformly spread switching losses and improve reliability.
Existing NP voltage balancing techniques that are based on common mode voltage injection result in uneven thermal stress among different power semiconductor devices within the NPC converter. Overcoming these thermal stresses requires overrating the semiconductor devices and/or limiting the operating range of the converter in order to stay within the thermal constraints of all devices.
Other approaches to voltage balancing include carrier offset or bias injection techniques or modifying short vector duration as a direct function of voltage measurement. Further, typical solutions employ a non-space vector modulation technique with PWM overlap. These techniques evaluate harmonics to set the redundant short vector ratio, however, the resulting solutions are computationally complex.
What is needed is an approach to operating an NPC converter with improved voltage balance control.